Novel dual-Vth independent-gate FinFET circuits
نویسندگان
چکیده
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enable series and parallel merge transformations in logic gates, realizing compact low power alternatives. Furthermore, they also enable the design of a new class of compact logic gates with higher expressive power and flexibility than conventional forms, e.g., implementing 12 unique Boolean functions using only four transistors. The gates are designed and calibrated using the University of Florida double-gate model into a technology library. Synthesis results for 14 benchmark circuits from the ISCAS and OpenSPARC suites indicate that on average, the enhanced library reduces delay, power, and area by 9%, 21%, and 27%, respectively, over a conventional library designed using FinFETs in 32nm technology.
منابع مشابه
Performance Improvement of FinFET using Nitride Spacer
The Double Gate FinFET has been designed for 90nm as an alternative solution to bulk devices. The FinFET with independent gate (IDG) structure is designed to control Vth. When the Vth is controlled the leakage current can be decreased by improving its current driving capability. The metal used for the front gate and back gate is TiN. Here the device performance is compared using nitride spacer ...
متن کاملFinFET domino logic with independent gate keepers
Scaling of single-gate MOSFET faces great challenges in the nanometer regime due to the severe shortchannel effects that cause an exponential increase in the sub-threshold and gate-oxide leakage currents. Double-gate FinFET technology mitigates these limitations by the excellent control over a thin silicon body by two electrically coupled gates. In this paper a variable threshold voltage keeper...
متن کاملRF and Noise performance exploration of Double Gate FinFET
Double Gate FinFET devices are suitable for nano electronic circuits due to better scalability, higher on-current (Ion), improved Sub-threshold Slope (SS) and undoped body (no random dopant fluctuation). Body thickness (TSi) increases the gate control over the channel resulting in reduced short channel effects (SCEs). Thin Tsi increases the quantum confinement of charge, resulting increased thr...
متن کاملOptimization of Gate – Source/Drain Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations
The effect of gate – drain/source underlap (Lun) on a narrow band LNA performance has been studied, in 30 nm FinFET using device and mixed mode simulations. Studies are sssssdone by maintaining and not maintaining the leakage current (Ioff) and threshold voltage (Vth) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain a...
متن کاملPower Minimization by Simultaneous Dual - Vth Assignment and Gate -
|Gate-sizing is an eeective technique to optimize CMOS circuits for dynamic power dissipation and performance while dual-V th (threshold voltage) CMOS is ideal for leakage power reduction in low voltage circuits. This paper focuses on simultaneous dual-V th assignment and gate-sizing to minimize the total power dissipation while maintaining high performance. An accurate power dissipation model ...
متن کامل